Applied spintronics – Si-embedded vertical magnetic tunnel junctions

Magnetic Random Access Memories are now commercial products as cache memories or fast/low-power memories such as in FPGAs. Opening new markets such as fast and massive RAM memories for processors requires to further increase the areal density, and ideally shift to a 3D design similar to 3D NAND flash. A first move along this path was the proposal of the Perpendicular Shape Anisotropy (PSA) MRAM, made independently by two groups, Tohoku in Japan, and SPINTEC in France. The proof-of-concept of R/W operation was made down to 5 nm electrical diameter (Fig.1). However, a bottleneck remains as regards fabrication, preventing to turn the concept in a practical device: so far the nanopillars have been obtained by aggressive etching and lateral trimming, severely limiting their integration in somewhat dense architectures. The aim of the present project is to demonstrate the fabrication of fully-functional magnetic tunnel junctions compatible with microelectronic industry standards. The magnetic free layers will be embedded in state-of-the-art <25nm vertical vias, and magnetic tunnel junctions will be fabricated atop these.