Location : Leuven, Belgium
Yearly income :
Research Target: The aim of the PhD is the Modelling and Design of SOT-MRAM for high speed memory applications. The major part of this will involve circuit design and analysis of SOT-MRAM for representative target platforms and application domains. Another important aspect of the PhD work will be to model the electrical characteristics and predict their behavior of the device. To this end, a close interaction between process and device experts and within a team consisting of experts in various fields (processing, integration, physical characterization, modeling, reliability, etc.) will be crucial. Interested candidates should contact both daily advisors (see below) for more ample information.
 C. Chappert et al., Nature Material (2007);  M. Miron et al., Nature (2011);  M. Cubucku et al., APL (2014);  G. Prenat et. al., IEEE Trans. on Multi-Scale Computing Systems, Vol. 2, pp.49-60 (2016)
Type of work: 55% circuit design, 35% device modeling and design, 10% literature
Supervisors: Francky Catthoor, Jan Van Houdt
Daily advisors: Sushil Sakhare, Kevin Garello
The reference code for this PhD position is STS1712-34. Mention this reference code on your application form.
For more information on the background of the project and application follow the link: